Method and apparatus for chemical-mechanical polishing

ABSTRACT

In accordance with at least one example embodiment, a method of chemical-mechanical polishing includes re-polishing a polished layer on a wafer based on a measured thickness of the polished layer. In accordance with at least one example embodiment, an apparatus for chemical-mechanical polishing may include a thickness measuring unit configured to measure a thickness of a polished surface on a wafer and to determine a re-polishing time based on the measured thickness. In accordance with example embodiments, a thickness deviation between different lots, wafers, or chips inside a wafer is reduced regardless of the durability of a polishing pad, a polishing head, or a disk used in a polishing apparatus.

PRIORITY STATEMENT

This application claims priority under 35 U.S.C. §119 to Korean PatentApplication No. 10-2008-0044726, filed on May 14, 2008, in the KoreanIntellectual Property Office (KIPO), the entire contents of which areherein incorporated by reference.

BACKGROUND

1. Field

Example embodiments relate to a method and apparatus forchemical-mechanical polishing, and more particularly, to a method andapparatus for chemical-mechanical polishing an insulation layer formedon a wafer, a metal layer formed on a wafer, and/or a surface of awafer.

2. Description of the Related Art

During the fabrication of semiconductor devices, stepped layers may beformed which require planarization in order to adequately formsemiconductor patterns. An example of such a planarization process ischemical-mechanical polishing (CMP), which involves planarizing amaterial layer by performing both a chemical and a mechanical polishingoperation.

A conventional CMP device includes an elastic polishing pad, a rotatablepolishing head, a pad conditioner, and a device for supplying a slurry,e.g., a polishing solution. According to conventional CMP processes, thepolishing head may apply pressure to a wafer during the polishingprocess. The polishing head may also be configured to rotate whileapplying pressure to the wafer.

According to conventional CMP processes, the slurry may include minutepolishing particles in a chemical solution. The slurry is providedbetween the wafer and the polishing pad, and the surface of the wafer ispolished by pressurizing and rotating the polishing head on the wafer.In conventional CMP processes, a platen, in which the polishing pad isattached, is rotated in a fixed direction. The platen rotates in onedirection at a uniform speed in order to uniformly polish the surface ofthe wafer.

According to a conventional CMP method, when a target thickness of awafer is about 3500 Å, the total thicknesses of a plurality of wafersincluded in one lot (the plurality of wafers are vertically aligned forconvenient transportation) are between about 3200 to 3800 Å, and adifference between the thicknesses of the wafers may be approximately600 Å. Also, the thickness of one wafer may be about 2900˜4100 Å, and adifference of the thickness between the center and edge of the wafer maybe about 1200 Å. Moreover, the thickness of one chip included in a wafermay be about 2850˜4150 Å, and a difference of the thickness of the chipmay be about 1500 Å, according to the density of the chip.

When a wafer is polished and a contact is etched for a predetermined orgiven time, the contact may be un-etched or punched through due to theabove-described differences, and thus a problem, such as a leak betweenthe contact and a polysilicon, may occur.

SUMMARY

Example embodiments relates to apparatus for chemical-mechanicalpolishing and a method of chemical-mechanical polishing a material,e.g., a wafer, a metal layer, and/or an insulation layer.

In accordance with at least one example embodiment, a method ofchemical-mechanical polishing includes re-polishing a polished layer ona wafer based on a measured thickness of the polished layer.

In accordance with at least one example embodiment, an apparatus forchemical-mechanical polishing may include a thickness measuring unitconfigured to measure a thickness of a polished surface on a wafer andto determine a re-polishing time based on the measured thickness.

BRIEF DESCRIPTION OF THE DRAWINGS

Example embodiments will be more clearly understood from the followingdetailed description taken in conjunction with the accompanyingdrawings. FIGS. 1-6 represent non-limiting, example embodiments asdescribed herein.

FIG. 1 is a block diagram of an apparatus for chemical-mechanicalpolishing according to an embodiment of the present invention;

FIG. 2 is a flowchart of a method of chemical-mechanical polishing,according to an embodiment of the present invention;

FIG. 3 is a flowchart of a method of chemical-mechanical polishing,according to an embodiment of the present invention;

FIG. 4 is a graph showing change of a polishing amount according todurability of a polishing pad, when conventional chemical-mechanicalpolishing is performed;

FIG. 5 is a graph showing change of a polishing amount according to adurability of a polishing pad, when chemical-mechanical polishingaccording to an embodiment of the present invention is performed; and

FIG. 6 is a graph showing change of a thickness of an inter layerdielectric layer on the surface of a wafer, when a method ofchemical-mechanical polishing according to an embodiment of the presentinvention is performed.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

Reference will now be made in detail to example embodiments, examples ofwhich are illustrated in the accompanying drawings. However, exampleembodiments are not limited to the embodiments illustrated hereinafter,and the embodiments herein are introduced to provide easy and completeunderstanding of the scope and spirit of example embodiments. In thedrawings, the thicknesses of layers and regions are exaggerated forclarity.

It will be understood that when an element, such as a layer, a region,or a substrate, is referred to as being “on,” “connected to” or “coupledto” another element, it may be directly on, connected, or coupled to theother element or intervening elements that may be present. In contrast,when an element is referred to as being “directly on,” “directlyconnected to” or “directly coupled to” another element or layer, thereare no intervening elements or layers present. Like reference numeralsrefer to like elements throughout. As used herein, the term “and/or”includes any and all combinations of one or more of the associatedlisted items.

It will be understood that, although the terms first, second, third etc.may be used herein to describe various elements, components, regions,layers and/or sections, these elements, components, regions, layersand/or sections should not be limited by these terms. These terms areonly used to distinguish one element, component, region, layer orsection from another region, layer or section. Thus, a first element,component, region, layer or section discussed below could be termed asecond element, component, region, layer or section without departingfrom the teachings of example embodiments.

Spatially relative terms, such as “above,” “upper,” “beneath,” “below,”“lower,” and the like, may be used herein for ease of description todescribe one element or feature's relationship to another element(s) orfeature(s) as illustrated in the figures. It will be understood that thespatially relative terms are intended to encompass differentorientations of the device in use or operation in addition to theorientation depicted in the figures. For example, if the device in thefigures is turned over, elements described as “below” or “beneath” otherelements or features would then be oriented “above” the other elementsor features. Thus, the exemplary term “above” may encompass both anorientation of above and below. The device may be otherwise oriented(rotated 90 degrees or at other orientations) and the spatially relativedescriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of exampleembodiments. As used herein, the singular forms “a,” “an” and “the” areintended to include the plural forms as well, unless the context clearlyindicates otherwise. It will be further understood that the terms“comprises” and/or “comprising” when used in this specification, specifythe presence of stated features, integers, steps, operations, elements,and/or components, but do not preclude the presence or addition of oneor more other features, integers, steps, operations, elements,components, and/or groups thereof.

Example embodiments are described herein with reference tocross-sectional illustrations that are schematic illustrations ofexample embodiments (and intermediate structures). As such, variationsfrom the shapes of the illustrations as a result, for example, ofmanufacturing techniques and/or tolerances, are to be expected. Thus,example embodiments should not be construed as limited to the particularshapes of regions illustrated herein but may be to include deviations inshapes that result, for example, from manufacturing. For example, animplanted region illustrated as a rectangle may, typically, have roundedor curved features and/or a gradient of implant concentration at itsedges rather than a binary change from implanted to non-implantedregion. Likewise, a buried region formed by implantation may result insome implantation in the region between the buried region and thesurface through which the implantation takes place. Thus, the regionsillustrated in the figures are schematic in nature and their shapes maynot be intended to illustrate the actual shape of a region of a deviceand are not intended to limit the scope of example embodiments.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which example embodiments belong. Itwill be further understood that terms, such as those defined in commonlyused dictionaries, should be interpreted as having a meaning that isconsistent with their meaning in the context of the relevant art andwill not be interpreted in an idealized or overly formal sense unlessexpressly so defined herein.

FIG. 1 is a block diagram of an apparatus configured to chemicallyand/or mechanically polish a material in accordance with an embodimentof the present invention. Referring to FIG. 1, the apparatus may includea polishing unit 11, and a cleaning unit 12. The polishing unit 11 mayinclude a first platen 111, a second platen 112, a thickness measuringunit 113, and a third platen 114. Although only three platens areillustrated in FIG. 1, the polishing unit 11 may include more or lessplatens.

The polishing unit 11 may chemically and/or mechanically polish amaterial layer formed on a wafer, e.g., an insulation layer or a metallayer. The polishing unit 11 may also chemically and/or mechanicallypolish a surface of a wafer, for example, a back surface of a wafer.Hereinafter, for convenience of description, the material layer formedon the wafer and/or the surface of the wafer undergoing the polishingprocess are referred to generally as the surface of the wafer.

A first polishing pad may be attached to the top of the first platen111, and a wafer may be disposed on the surface of the first polishingpad. The polishing unit 11 may reduce the thickness of the surface ofthe wafer by a first removal amount. The thickness may be reduced bysupplying slurry while the wafer contacts the surface of the firstpolishing pad so as to chemically react the surface of the wafer withthe slurry while operating the first platen 111 to mechanically polishthe wafer. The wafer may be transferred while attached to a polishinghead. During this polishing operation the wafer may be pressed againstthe first polishing pad and/or the first platen 111 to contact the firstpolishing pad and/or first platen 111. During this operation, the firstpolishing time may be fixed.

A second polishing pad may be attached to the top of the second platen112, and the wafer having been polished by the first platen 111 may bedisposed on the surface of the second polishing pad. The polishing unit11 may reduce the thickness of the surface of the wafer over a secondpolishing time by removing a second removal amount. The thickness may bereduced by supplying slurry to chemically react with the surface of thewafer while the wafer contacts the surface of the second polishing padand operating the second platen 112 in conjunction with the polishinghead to mechanically polish the material. During this polishingoperation, the wafer may contact the second polishing pad and may bepressed against the second polishing pad and/or the second platen 112.During this operation, the second polishing time may be fixed.

In accordance with at least one example embodiment, the amount ofmaterial removed by the first and second platens 111 and 112 may beabout 50˜90% of the total removal amount.

The cleaning unit 12 may clean the wafer polished by the second platen112 and may supply the cleaned wafer to the thickness measuring unit113. In accordance with at least one example embodiment, the measuringunit 113 may be included in the polishing unit 11. In accordance with anexample embodiment, the cleaning unit 12 may also clean the waferpolished by the third platen 114 and may supply the cleaned wafer againto the thickness measuring unit 113.

The thickness measuring unit 113 may determine a third polishing timefor the wafer on the third platen 114. The third polishing time may bebased on the measured thickness of the surface of the cleaned wafer. Forexample, when the thickness of the surface of the wafer is thicker thana target value, the thickness measuring unit 113 may increase the thirdpolishing time, and when the thickness of the surface of the wafer isthinner than the target value, the thickness measuring unit 113 maydecrease the third polishing time. In an example embodiment, when themethod is performed on an inter layer dielectric (ILD) layer formed onthe wafer, the thickness measuring unit 113 may determine the thirdpolishing time by measuring the thickness of the ILD layer.

In accordance with an example embodiment, a time polish method, whichmay adjust a polishing time, may be used so that the polishing isperformed up to a targeted thickness. The time polish method may beperformed to reach a polishing target by performing the polishing for apredetermined or given time. In accordance with this example embodiment,the method may consider a polishing ratio (the number of polishingparticles applied over a unit area of the polished surface) forpolishing the wafer. In this embodiment, the wafer is re-polished bydirectly measuring the thickness of the wafer.

A third polishing pad may be attached to the top of the third platen114, and the cleaned wafer may be disposed on a surface of thirdpolishing pad. The polishing unit 11 may reduce the thickness of thesurface of the wafer over a third polishing time by removing a thirdremoval amount. The material may be removed by supplying a slurry tochemically react with the surface of the wafer while the wafer contactsthe third polishing pad, and mechanically polishing the surface of thewafer by operating the third platen 114 in conjunction with thepolishing head. Here, the sum of the first through third removal amountsmay correspond to the targeted polishing amount of the wafer. The waferpolished by the third platen 114 may again be supplied to the cleaningunit 12. Here, the third polishing time may vary according to the resultof the thickness measuring unit 113.

After cleaning the polished wafer, the cleaning unit 12 may supply thewafer again to the thickness measuring unit 113. Then, the thicknessmeasuring unit 113 may measure the thickness of the surface of thewafer, and may determine whether the measured thickness is within astandard range. For example, when the measured thickness is within thestandard range, i.e., when the measured thickness is close to the targetthickness, the thickness measuring unit 113 may determine to output thewafer. Alternatively, when the measured thickness exceeds the standardrange, i.e., when the measured thickness is thicker than the targetthickness, the thickness measuring unit 113 may determine to output thewafer to the third platen 114 to remove more material. Alternatively,when the measured thickness is under the standard range, i.e., when themeasured thickness is thinner than the target thickness, the thicknessmeasuring unit 113 may determine to re-deposit a corresponding materiallayer on the surface of the wafer.

According to another example embodiment, the cleaning unit 12 maydirectly output the wafer instead of supplying the wafer to thethickness measuring unit 113, after cleaning the wafer.

FIG. 2 is a flowchart of a method for chemical-mechanical polishing,according to an example embodiment. The method performed on an ILD layerformed on a surface of the wafer, according to example embodiments, willnow be described in time series with reference to FIGS. 1 and 2. Howeveras described above, the method may also be applied on an insulationlayer or a metal layer formed on the surface of the wafer, or the backsurface of the wafer.

In operation 20, the ILD layer formed on the surface of the wafer ispolished on a first platen P1 for a given or predetermined time.

In operation 21, the ILD layer polished on the first platen P1 ispolished on a second platen P2 for a given or predetermined time.

In operation 22, the cleaning unit 12 cleans the polished wafer.

In operation 23, a re-polishing time is determined by measuring thethickness (Tox) of the ILD layer on the cleaned wafer. The re-polishingtime may be determined in several ways. For example, the Tox may be usedin conjunction with a look-up table, wherein the look-up table storesempirically determined re-polishing times based on the measured Tox. Inthe alternative, the re-polishing time may be determined by an equation,such as a polynomial, wherein the coefficients of the polynomial aredetermined empirically, the measured Tox is the input variable of theequation and the re-polishing time is the output of the equation.

In operation 24, the third platen P3 re-polishes the wafer for there-polishing time.

In operation 25, the cleaning unit 12 may clean the re-polished wafer.

In operation 26, the Tox of the ILD layer on the cleaned wafer may bemeasured. In accordance with an example embodiment, operation 26determines whether or not to remove more material from the substrate.For example, if the Tox of the ILD layer exceeds a standard range,operation 24 is performed; otherwise, if the Tox of the ILD layer isunder the standard range (if the ILD layer has been overpolished),operation 27 is performed. Also, when the Tox is within the standardrange, the method ends by outputting the wafer.

In operation 27, the ILD layer having a predetermined or given thicknessmay be re-deposited on the surface of the wafer.

FIG. 3 is a flow chart illustrating another method forchemical-mechanical polishing according to another example embodiment.The method illustrated in FIG. 3 is similar to the method of illustratedin FIG. 2. For example, steps 30, 31, 32, 33, 34, 35, 36, and 37correspond to steps 20, 21, 22, 23, 24, 25, 26, and 27 illustrated inFIG. 2. In the example embodiment illustrated in FIG. 3, a firstre-polishing time for a first re-polishing operation is determined bymeasuring the Tox of the ILD layer after the layer is polished inoperations 30 and 31 and cleaned in operation 32. However, in theexample embodiment illustrated in FIG. 3, the re-polishing time forsubsequent re-polishing operations is re-determined based on the Tox ofthe ILD layer after the layer is re-polished. In other words, after theILD layer has been re-polished for a first re-polishing time, there-polished layer may be re-polished in subsequent re-polishingoperations for re-determined re-polishing times based on the Tox of theILD layer after the ILD layer has been re-polished.

The operation 33 determines and/or re-determines a re-polishing time bymeasuring the Tox of the ILD layer on a polished and/or re-polishedwafer. The re-polishing time determined and/or re-determined inoperation 33 may be determined and/or re-determined in several ways. Forexample, the Tox of the polished and/or re-polished ILD layer may beused in conjunction with a look-up table, wherein the look-up tablestores empirically determined re-polishing times based on the measuredTox. In the alternative, the re-polishing time may be determined by anequation, such as a polynomial, wherein the coefficients of thepolynomial are determined empirically, the measured Tox is the inputvariable of the equation and the re-polishing time is the output of theequation. As explained above, an initial re-polishing time may be basedon the Tox of the ILD layer after the ILD layer has been polished andcleaned in operations 30, 31, and 32. Subsequent re-polishing times, forexample, a second re-polishing time, are determined based on the Tox ofthe ILD after the ILD has been re-polished in steps 34 and 35.

The methods performed on the ILD layers formed on the wafer isillustrated in time series in FIGS. 2 and 3, however, the method mayalso be performed on a shallow trench isolation (STI) layer formed onthe wafer. STI denotes forming a trench for electrical isolation of asemiconductor device. The method performed on the STI layer will now bedescribed in brief. First, a silicon nitride is deposited on a wafer,and a trench may be formed in the wafer using an optical lithographyprocess and/or a dry etching process. The external wall of the trench isoxidized via a high-temperature heating process, and the internal trenchis filled with oxide using a quick depositing method. An oxide layer isremoved via a CMP process, and the remaining nitride layer may beremoved using a plasma etching method. Accordingly, a trench filled onlywith an insulating material is formed, thereby electrically separating asemiconductor device.

Also as described above, the method may be applied to a metal layerformed on the wafer, for example, the method may be applied to adamascene process. Here, the damascene process may be used whilemanufacturing metal wiring in a semiconductor. The damascene process mayuse metals such as aluminum, tungsten, copper, etc.

When the metal wiring process uses aluminum, the aluminum may bedeposited on a surface of the wafer, and an aluminum wiring pattern maybe formed using an optical lithography process and/or a dry etchingprocess. An oxide layer may be coated around the metal wiring forinsulation, and performing the polishing method flattens the requiredareas.

When the metal wiring process uses copper, an insulation oxide layer maybe formed on a surface of the wafer, and a patterning on aphotosensitive layer may be performed via an optical lithographyprocess. A wiring line may be formed inside the insulation oxide layervia a dry etching process. The copper may be coated by using anelectroplating method, and materials, except for the copper, may beremoved from inside the wiring line by polishing the materials using anelectroplating method. The metal wiring process using copper may becompleted by re-depositing the insulation oxide layer on the metalwiring.

FIG. 4 is a graph illustrating the amount of material removed (polishingamount) from a material, for example, a wafer, as a function of thecondition or age of the polishing pad (durability) over a given orpredetermined length of time when using a conventionalchemical-mechanical polishing system.

Referring to FIG. 4, the abscissa denotes the condition or age of apolishing pad (durability) in seconds and the vertical axis denotes theamount of material removed (polishing amount) in Å units. In particular,the left side of the abscissa represents the condition of a new pad andthe right side of the abscissa represents the condition of an old pad.The polishing amount per second of the polishing pad used in anapparatus for chemical-mechanical polishing decreases as the polishingpad is used for a relatively long time. For example, when a newpolishing pad is used, the polishing amount per second may be about 35.7Å/s, and when an old polishing pad is used, the polishing amount persec. may be about 25.3 Å/s. In accordance with this example, when atarget polishing amount is, for example, 2200 Å, the actual polishingamount may be between about 1900˜2500 Å according to the condition orage of the polishing pad, and thus approximately 600 Å of variation mayexist in the material removed using the conventional chemical-mechanicalpolishing system.

FIG. 4 illustrates the variation of the polishing amount according tothe durability of the polishing pad, but FIG. 4 is only an exemplaryembodiment, and the variation of the polishing amount according to thedurability of the polishing head and a disk may show similar results.

According to the conventional chemical-mechanical polishing, the surfacethickness of a wafer input to a polishing unit, i.e., an unpolishedwafer, may be measured, and then a third polishing time for performingpolishing on a third platen may be determined. In this case, adifference between the thickness of the inputted wafer and a targetthickness may be quite large, and thus the extra material to be removedmay also be quite large. Accordingly, the required amount of material tobe removed may be large. Also, the variation of the removal amount mayincrease according to the durability of polishing pad, durability of thedisk, and/or the variation of the polishing head.

FIG. 5 is a graph showing change of a polishing amount according to adurability of a polishing pad, when chemical-mechanical polishingaccording to example embodiments is performed. Referring to FIG. 5, thehorizontal axis denotes the durability of a polishing pad or a disk, andthe vertical axis denotes a polishing amount in Å units. For example,when a target polishing amount is 440 Å, the actual polishing amount is380˜535 Å according to the durability of the polishing pad or disk, andthus variation of approximately 155 Å exists.

According to example embodiments, the surface thickness of a wafer inputto a polishing unit is not measured, rather the surface thickness of awafer that is polished for a predetermined or given time after beinginput to the polishing unit, for example, a wafer that is polished onfirst and second platens, is measured. Accordingly, a removal amountthat is substantially polished by a third platen reduces, and thus,variation of the removal amount also reduces. Consequently, a differencebetween thicknesses of surfaces of wafers that is chemically and/ormechanically polished, or chips inside a wafer is not large.

FIG. 6 is a graph showing change of a thickness of an ILD layer on thesurface of a wafer, when a method of chemical-mechanical polishingaccording to example embodiments is performed. Referring to FIG. 6, whena target thickness (Tox) of the ILD layer is 3500 Å, a variation ofabout 500 Å may occur according to a conventional method. However,according to at least one example embodiment, when the target thicknessis about 3100 Å, a variation of approximately 140 Å may occur.Accordingly, by using the method of chemical-mechanical polishing ofexample embodiments, a difference in thicknesses between lots, wafers,or ILD layers between chips inside a wafer can be reduced.

According to at least one example embodiment, a method ofchemical-mechanical polishing may include polishing an insulation layerformed on a wafer for a first polishing time, measuring the thickness ofthe polished insulation layer, determining a second polishing time forthe insulation layer based on the measured thickness, and re-polishingthe insulation layer for the second polishing time. Accordingly,thickness deviation between different lots, wafers, or chips inside awafer is remarkably reduced regardless of the durability of a polishingpad, a polishing head, or a disk used in a polishing apparatus.

At least one example embodiment may also be embodied as computerreadable codes on a computer readable recording medium. The computerreadable recording medium may be any data storage device that may storedata, which may be thereafter read by a computer system. Examples of thecomputer readable recording medium include read-only memory (ROM),random-access memory (RAM), CD-ROMs, magnetic tapes, floppy disks,optical data storage devices, and carrier waves (such as datatransmission through the Internet). The computer readable recordingmedium can also be distributed over network coupled computer systems sothat the computer readable code may be stored and executed in adistributed fashion. Here, a program stored in a recording medium may beexpressed in a series of instructions used directly or indirectly withina device with a data processing capability, for example, computers.Thus, a term “computer” may involve all devices with data processingcapability in which a particular function may be performed according toa program using a memory, input/output devices, and arithmetic logics.

The foregoing is illustrative of example embodiments and is not to beconstrued as limiting thereof. Although example embodiments have beendescribed, those skilled in the art will readily appreciate that manymodifications are possible in example embodiments without materiallydeparting from the novel teachings and advantages of exampleembodiments. Accordingly, all such modifications are intended to beincluded within the scope of the claims. Therefore, it is to beunderstood that the foregoing is illustrative of example embodiments andis not to be construed as limited to the specific embodiments disclosed,and that modifications to the disclosed embodiments, as well as otherembodiments, are intended to be included within the scope of theappended claims. Example embodiments are defined by the followingclaims, with equivalents of the claims to be included therein.

1. A method of chemical-mechanical polishing, the method comprising:first re-polishing of a polished layer on a wafer based on a measuredthickness of the polished layer.
 2. The method of claim 1, furthercomprising: polishing a layer on the wafer to form the polished layer;measuring a thickness of the polished layer; first determining are-polishing time based on the measured thickness; and wherein the firstre-polishing step re-polishes the polished layer for the determinedre-polishing time.
 3. The method of claim 2, wherein the polishing stepcomprises: polishing the layer for a first fixed time on a first platen;and polishing the layer for a second fixed time on a second platen. 4.The method of claim 2, wherein the first re-polishing step re-polishesthe polished layer on a third platen for the determined re-polishingtime.
 5. The method of claim 2, further comprising: first cleaning thewafer after the polishing step and before the first re-polishing step.6. The method of claim 5, wherein the measuring step measures thethickness of the polished layer after the first cleaning step.
 7. Themethod of claim 2, further comprising: measuring the thickness of there-polished layer; second determining whether to re-polish there-polished layer based on the measured thickness of the re-polishedlayer; and second re-polishing the re-polished layer if the seconddetermining step determines to re-polish the re-polished layer.
 8. Themethod of claim 7, further comprising: second cleaning the wafer afterthe second re-polishing step.
 9. The method of claim 8, wherein themeasuring the thickness of the re-polished layer step measures thethickness of the re-polished layer after the second cleaning step. 10.The method of claim 7, wherein the second re-polishing step re-polishesthe re-polished layer on the third platen for the re-polishing time. 11.The method of claim 7, further comprising: determining a secondre-polishing time if the second determining step determines to re-polishthe re-polished layer.
 12. The method of claim 11, wherein the secondre-polishing time is based on a measured thickness of the re-polishedlayer.
 13. The method of claim 11, wherein the second re-polishing stepre-polishes the re-polished layer on the third platen for the secondre-polishing time.
 14. The method of claim 2, wherein the polishing stepremoves 50˜90% of a total amount of the layer removed by the method. 15.The method of claim 1, wherein the layer is an insulation layer.
 16. Themethod of claim 15, wherein the layer is at least one of an inter-layerdielectric layer and a shallow trench isolation layer.
 17. The method ofclaim 1, wherein the layer is a metal layer.
 18. The method of claim 17,wherein the metal layer includes any one of tungsten (W), aluminum (Al),and copper (Cu) layers.
 19. The method of claim 7, wherein the seconddetermining step determines whether the layer has been overpolishedbased on the measured thickness of the re-polished layer.
 20. The methodof claim 19, further comprising: redepositing a layer on a surface ofthe wafer if the second determining step determines the layer has beenoverpolished. 21-25. (canceled)